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Nader Rafla P.E.

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https://peer.asee.org/authors/24744

Co-authors:

Flipping a Hardware Design Class: An Encouragement of Active Learning. Should it Continue?

Conference Session
Electrical and Computer Division Technical Session 3
Collection
2018 ASEE Annual Conference & Exposition
Authors
Nader Rafla, Boise State University; H. Shelton Jacinto, Boise State University

Teaching Digital Systems Verification Methodologies using SystemVerilog

Conference Session
ECE Division Poster Session
Collection
2011 ASEE Annual Conference & Exposition
Authors
Nader Rafla, Boise State University

Teaching the Hardware Implementation of Cybesecurity Encryption Algorithms on FPGA using Hands-on Projects

Conference Session
Embedded Systems & Cybersecurity for ECE
Collection
2019 ASEE Annual Conference & Exposition
Authors
Nader Rafla P.E., Boise State University; H. Shelton Jacinto, Boise State University; Luka Daoud, Boise State University

Work in Progress - Teaching Hardware Implementation of Digital Signal Processing Algorithms on FPGAs

Conference Session
Computers in Education Division Poster Session
Collection
2012 ASEE Annual Conference & Exposition
Authors
Nader Rafla, Boise State University